SMT technology has been around since the 1960’s, pioneered by IBM and initially used in hybrid circuits. Military and space systems also used it for quite a while before it became common in commercial applications.

SMT components achieve size reduction mainly by eliminating through-hole leads. SMT contacts can be spaced much closer in dense patterns that are only limited by the PCB lithography process, not the drilling and wave solder process used in through-hole.

It doesn’t stop there, though. Within the package, new mounting technologies like flip-chip, multi-chip module and 3D (stacked) packages cram more inside and shrink the system footprint even more.

PCB processes have moved along too- laser drilled vias, blind and buried vias also allow denser signal routing at the board level.

The move to CMOS technology has reduced power consumption. This in turn allows smaller packaging because heat is reduced (all things being equal, smaller packages have higher thermal resistance than larger ones.)

Finally, the move to fast and narrow interfaces like LVDS, SATA, PCI Express, DDR2/3/4 and so forth also help to reduce pincount and power. Basically, the pins are made to work harder (higher signal rates) but with lower voltage swing.